DAS High-speed RF Data Acquisition Boards
Introduction
This is a high-speed acquisition board with dual-channel acquisition, 14bits (ADC), 16bits (DAC), PCIEX8, 250MSps and other features. It is equipped with a high-performance FPGA chip, implements a high-speed interface through the JESD204 protocol, and uses a large-capacity cache to support real-time transmission of the entire link. In this case, it can support up to 2GB/s of real-time data transmission. The driver has good compatibility and supports multiple versions of WINDOWS and LINUX.
Feature
14bits dual-channel synchronous real-time acquisition
250MSps sampling rate
AC coupling, 50Ω input impedance
2Vpp input voltage range
90dBc SFDR
PCIEx8 high-speed transmission interface
2Gb DDR3 high-speed data cache
Application
Radar signal acquisition and analysis
Electronic reconnaissance and monitoring
Teaching and training exercises
Software radio equipment development
Broadband signal recording and playback
Wireless communication
Software radio
Electronic countermeasures
Electronic reconnaissance
Specification
Parameter | Value | Unit |
Model | ZG-25M2DAS-A |
|
Input channel no. | 2 |
|
Input resistance | 50 | Ω |
Input signal range | 2Vp-p/10dBm |
|
Input coupling mode | AC/DC |
|
Resolution ratio | 14bits | bits |
Bandwidth(-3dB) | 0~200 | MHz |
Sampling | 250 | Msps |
Average noise density | -140 | dBm/Hz |
On-board acquisition memory | ddr3 | (2G) |
Power supply | 12 | V |
Interface | Pciex8 |
|
Mechanical dimension | 181mm(L) x 111mm(W)x20mm(D) |
|
on-board algorithm
1、Supports IQ demodulation function
2、Support trigger acquisition
3、FIR filter
Ordering info
ZG | Sampling | hardware version | Channel number | Application | Software Version |
25=250MSps | M=basic module | 1=Single-channel acquisition 2=Dual-channel acquisition | DAS=Distributed optical fiber system | A=General B=Customization
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